MCR p15,0,<Rd>,c7,c10,4 ; Data Synchronization Barrier operation.數據同步屏障操作。
可查看官方內核手冊：
This instruction acts as an explicit memory barrier. This instruction completes when all
explicit memory transactions occurring in program order before this instruction are
completed. No instructions occurring in program order after this instruction are
executed until this instruction completes. Therefore, no explicit memory transactions
occurring in program order after this instruction are started until this instruction
completes. See Explicit Memory Barriers on page 6-30.
It can be used instead of Strongly Ordered memory when the timing of specific stores
to the memory system has to be controlled. For example, when a store to an interrupt
acknowledge location must be completed before interrupts are enabled.
The Data Synchronization Barrier operation can be performed in both privileged and
User modes of operation.